
strstr2:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400570 <_init>:
  400570:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400574:	910003fd 	mov	x29, sp
  400578:	94000040 	bl	400678 <call_weak_fn>
  40057c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400580:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400590 <.plt>:
  400590:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400594:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf608>
  400598:	f947fe11 	ldr	x17, [x16, #4088]
  40059c:	913fe210 	add	x16, x16, #0xff8
  4005a0:	d61f0220 	br	x17
  4005a4:	d503201f 	nop
  4005a8:	d503201f 	nop
  4005ac:	d503201f 	nop

00000000004005b0 <strlen@plt>:
  4005b0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4005b4:	f9400211 	ldr	x17, [x16]
  4005b8:	91000210 	add	x16, x16, #0x0
  4005bc:	d61f0220 	br	x17

00000000004005c0 <atoi@plt>:
  4005c0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4005c4:	f9400611 	ldr	x17, [x16, #8]
  4005c8:	91002210 	add	x16, x16, #0x8
  4005cc:	d61f0220 	br	x17

00000000004005d0 <__libc_start_main@plt>:
  4005d0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4005d4:	f9400a11 	ldr	x17, [x16, #16]
  4005d8:	91004210 	add	x16, x16, #0x10
  4005dc:	d61f0220 	br	x17

00000000004005e0 <__gmon_start__@plt>:
  4005e0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4005e4:	f9400e11 	ldr	x17, [x16, #24]
  4005e8:	91006210 	add	x16, x16, #0x18
  4005ec:	d61f0220 	br	x17

00000000004005f0 <abort@plt>:
  4005f0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4005f4:	f9401211 	ldr	x17, [x16, #32]
  4005f8:	91008210 	add	x16, x16, #0x20
  4005fc:	d61f0220 	br	x17

0000000000400600 <puts@plt>:
  400600:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400604:	f9401611 	ldr	x17, [x16, #40]
  400608:	9100a210 	add	x16, x16, #0x28
  40060c:	d61f0220 	br	x17

0000000000400610 <strstr@plt>:
  400610:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400614:	f9401a11 	ldr	x17, [x16, #48]
  400618:	9100c210 	add	x16, x16, #0x30
  40061c:	d61f0220 	br	x17

0000000000400620 <printf@plt>:
  400620:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400624:	f9401e11 	ldr	x17, [x16, #56]
  400628:	9100e210 	add	x16, x16, #0x38
  40062c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400630 <_start>:
  400630:	d280001d 	mov	x29, #0x0                   	// #0
  400634:	d280001e 	mov	x30, #0x0                   	// #0
  400638:	aa0003e5 	mov	x5, x0
  40063c:	f94003e1 	ldr	x1, [sp]
  400640:	910023e2 	add	x2, sp, #0x8
  400644:	910003e6 	mov	x6, sp
  400648:	580000c0 	ldr	x0, 400660 <_start+0x30>
  40064c:	580000e3 	ldr	x3, 400668 <_start+0x38>
  400650:	58000104 	ldr	x4, 400670 <_start+0x40>
  400654:	97ffffdf 	bl	4005d0 <__libc_start_main@plt>
  400658:	97ffffe6 	bl	4005f0 <abort@plt>
  40065c:	00000000 	.inst	0x00000000 ; undefined
  400660:	00400794 	.word	0x00400794
  400664:	00000000 	.word	0x00000000
  400668:	004008c8 	.word	0x004008c8
  40066c:	00000000 	.word	0x00000000
  400670:	00400948 	.word	0x00400948
  400674:	00000000 	.word	0x00000000

0000000000400678 <call_weak_fn>:
  400678:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf608>
  40067c:	f947f000 	ldr	x0, [x0, #4064]
  400680:	b4000040 	cbz	x0, 400688 <call_weak_fn+0x10>
  400684:	17ffffd7 	b	4005e0 <__gmon_start__@plt>
  400688:	d65f03c0 	ret
  40068c:	00000000 	.inst	0x00000000 ; undefined

0000000000400690 <deregister_tm_clones>:
  400690:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  400694:	91014000 	add	x0, x0, #0x50
  400698:	b0000081 	adrp	x1, 411000 <strlen@GLIBC_2.17>
  40069c:	91014021 	add	x1, x1, #0x50
  4006a0:	eb00003f 	cmp	x1, x0
  4006a4:	540000a0 	b.eq	4006b8 <deregister_tm_clones+0x28>  // b.none
  4006a8:	90000001 	adrp	x1, 400000 <_init-0x570>
  4006ac:	f944b421 	ldr	x1, [x1, #2408]
  4006b0:	b4000041 	cbz	x1, 4006b8 <deregister_tm_clones+0x28>
  4006b4:	d61f0020 	br	x1
  4006b8:	d65f03c0 	ret
  4006bc:	d503201f 	nop

00000000004006c0 <register_tm_clones>:
  4006c0:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  4006c4:	91014000 	add	x0, x0, #0x50
  4006c8:	b0000081 	adrp	x1, 411000 <strlen@GLIBC_2.17>
  4006cc:	91014021 	add	x1, x1, #0x50
  4006d0:	cb000021 	sub	x1, x1, x0
  4006d4:	9343fc21 	asr	x1, x1, #3
  4006d8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4006dc:	9341fc21 	asr	x1, x1, #1
  4006e0:	b40000a1 	cbz	x1, 4006f4 <register_tm_clones+0x34>
  4006e4:	90000002 	adrp	x2, 400000 <_init-0x570>
  4006e8:	f944b842 	ldr	x2, [x2, #2416]
  4006ec:	b4000042 	cbz	x2, 4006f4 <register_tm_clones+0x34>
  4006f0:	d61f0040 	br	x2
  4006f4:	d65f03c0 	ret

00000000004006f8 <__do_global_dtors_aux>:
  4006f8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4006fc:	910003fd 	mov	x29, sp
  400700:	f9000bf3 	str	x19, [sp, #16]
  400704:	b0000093 	adrp	x19, 411000 <strlen@GLIBC_2.17>
  400708:	39414260 	ldrb	w0, [x19, #80]
  40070c:	35000080 	cbnz	w0, 40071c <__do_global_dtors_aux+0x24>
  400710:	97ffffe0 	bl	400690 <deregister_tm_clones>
  400714:	52800020 	mov	w0, #0x1                   	// #1
  400718:	39014260 	strb	w0, [x19, #80]
  40071c:	f9400bf3 	ldr	x19, [sp, #16]
  400720:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400724:	d65f03c0 	ret

0000000000400728 <frame_dummy>:
  400728:	17ffffe6 	b	4006c0 <register_tm_clones>

000000000040072c <sub_string>:
  40072c:	d100c3ff 	sub	sp, sp, #0x30
  400730:	f9000fe0 	str	x0, [sp, #24]
  400734:	f9000be1 	str	x1, [sp, #16]
  400738:	b9000fe2 	str	w2, [sp, #12]
  40073c:	f9400fe0 	ldr	x0, [sp, #24]
  400740:	f90017e0 	str	x0, [sp, #40]
  400744:	14000009 	b	400768 <sub_string+0x3c>
  400748:	f9400be1 	ldr	x1, [sp, #16]
  40074c:	91000420 	add	x0, x1, #0x1
  400750:	f9000be0 	str	x0, [sp, #16]
  400754:	f9400fe0 	ldr	x0, [sp, #24]
  400758:	91000402 	add	x2, x0, #0x1
  40075c:	f9000fe2 	str	x2, [sp, #24]
  400760:	39400021 	ldrb	w1, [x1]
  400764:	39000001 	strb	w1, [x0]
  400768:	b9400fe0 	ldr	w0, [sp, #12]
  40076c:	7100001f 	cmp	w0, #0x0
  400770:	540000c0 	b.eq	400788 <sub_string+0x5c>  // b.none
  400774:	b9400fe0 	ldr	w0, [sp, #12]
  400778:	51000401 	sub	w1, w0, #0x1
  40077c:	b9000fe1 	str	w1, [sp, #12]
  400780:	7100001f 	cmp	w0, #0x0
  400784:	54fffe21 	b.ne	400748 <sub_string+0x1c>  // b.any
  400788:	f94017e0 	ldr	x0, [sp, #40]
  40078c:	9100c3ff 	add	sp, sp, #0x30
  400790:	d65f03c0 	ret

0000000000400794 <main>:
  400794:	a9ba7bfd 	stp	x29, x30, [sp, #-96]!
  400798:	910003fd 	mov	x29, sp
  40079c:	90000000 	adrp	x0, 400000 <_init-0x570>
  4007a0:	9125e000 	add	x0, x0, #0x978
  4007a4:	f9002fa0 	str	x0, [x29, #88]
  4007a8:	90000000 	adrp	x0, 400000 <_init-0x570>
  4007ac:	91264000 	add	x0, x0, #0x990
  4007b0:	f90027a0 	str	x0, [x29, #72]
  4007b4:	f94027a1 	ldr	x1, [x29, #72]
  4007b8:	f9402fa0 	ldr	x0, [x29, #88]
  4007bc:	97ffff95 	bl	400610 <strstr@plt>
  4007c0:	f9002ba0 	str	x0, [x29, #80]
  4007c4:	90000000 	adrp	x0, 400000 <_init-0x570>
  4007c8:	91272000 	add	x0, x0, #0x9c8
  4007cc:	79400000 	ldrh	w0, [x0]
  4007d0:	790063a0 	strh	w0, [x29, #48]
  4007d4:	f80323bf 	stur	xzr, [x29, #50]
  4007d8:	90000000 	adrp	x0, 400000 <_init-0x570>
  4007dc:	91276001 	add	x1, x0, #0x9d8
  4007e0:	910043a0 	add	x0, x29, #0x10
  4007e4:	f9400022 	ldr	x2, [x1]
  4007e8:	f9000002 	str	x2, [x0]
  4007ec:	b9400821 	ldr	w1, [x1, #8]
  4007f0:	b9000801 	str	w1, [x0, #8]
  4007f4:	aa1d03e0 	mov	x0, x29
  4007f8:	91007000 	add	x0, x0, #0x1c
  4007fc:	a9007c1f 	stp	xzr, xzr, [x0]
  400800:	79005bbf 	strh	wzr, [x29, #44]
  400804:	14000013 	b	400850 <main+0xbc>
  400808:	90000000 	adrp	x0, 400000 <_init-0x570>
  40080c:	91266000 	add	x0, x0, #0x998
  400810:	f9402fa1 	ldr	x1, [x29, #88]
  400814:	97ffff83 	bl	400620 <printf@plt>
  400818:	90000000 	adrp	x0, 400000 <_init-0x570>
  40081c:	9126a000 	add	x0, x0, #0x9a8
  400820:	f9402ba1 	ldr	x1, [x29, #80]
  400824:	97ffff7f 	bl	400620 <printf@plt>
  400828:	f94027a0 	ldr	x0, [x29, #72]
  40082c:	97ffff61 	bl	4005b0 <strlen@plt>
  400830:	aa0003e1 	mov	x1, x0
  400834:	f9402ba0 	ldr	x0, [x29, #80]
  400838:	8b010000 	add	x0, x0, x1
  40083c:	f9002fa0 	str	x0, [x29, #88]
  400840:	f94027a1 	ldr	x1, [x29, #72]
  400844:	f9402fa0 	ldr	x0, [x29, #88]
  400848:	97ffff72 	bl	400610 <strstr@plt>
  40084c:	f9002ba0 	str	x0, [x29, #80]
  400850:	f9402ba0 	ldr	x0, [x29, #80]
  400854:	f100001f 	cmp	x0, #0x0
  400858:	54fffd81 	b.ne	400808 <main+0x74>  // b.any
  40085c:	9100c3a0 	add	x0, x29, #0x30
  400860:	97ffff58 	bl	4005c0 <atoi@plt>
  400864:	2a0003e1 	mov	w1, w0
  400868:	90000000 	adrp	x0, 400000 <_init-0x570>
  40086c:	9126e000 	add	x0, x0, #0x9b8
  400870:	97ffff6c 	bl	400620 <printf@plt>
  400874:	910043a0 	add	x0, x29, #0x10
  400878:	91001000 	add	x0, x0, #0x4
  40087c:	9100c3a3 	add	x3, x29, #0x30
  400880:	52800082 	mov	w2, #0x4                   	// #4
  400884:	aa0003e1 	mov	x1, x0
  400888:	aa0303e0 	mov	x0, x3
  40088c:	97ffffa8 	bl	40072c <sub_string>
  400890:	f90023a0 	str	x0, [x29, #64]
  400894:	f94023a0 	ldr	x0, [x29, #64]
  400898:	97ffff5a 	bl	400600 <puts@plt>
  40089c:	90000000 	adrp	x0, 400000 <_init-0x570>
  4008a0:	91270000 	add	x0, x0, #0x9c0
  4008a4:	d2800061 	mov	x1, #0x3                   	// #3
  4008a8:	97ffff5e 	bl	400620 <printf@plt>
  4008ac:	90000000 	adrp	x0, 400000 <_init-0x570>
  4008b0:	9126e000 	add	x0, x0, #0x9b8
  4008b4:	52800121 	mov	w1, #0x9                   	// #9
  4008b8:	97ffff5a 	bl	400620 <printf@plt>
  4008bc:	52800000 	mov	w0, #0x0                   	// #0
  4008c0:	a8c67bfd 	ldp	x29, x30, [sp], #96
  4008c4:	d65f03c0 	ret

00000000004008c8 <__libc_csu_init>:
  4008c8:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4008cc:	910003fd 	mov	x29, sp
  4008d0:	a901d7f4 	stp	x20, x21, [sp, #24]
  4008d4:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf608>
  4008d8:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf608>
  4008dc:	91374294 	add	x20, x20, #0xdd0
  4008e0:	913722b5 	add	x21, x21, #0xdc8
  4008e4:	a902dff6 	stp	x22, x23, [sp, #40]
  4008e8:	cb150294 	sub	x20, x20, x21
  4008ec:	f9001ff8 	str	x24, [sp, #56]
  4008f0:	2a0003f6 	mov	w22, w0
  4008f4:	aa0103f7 	mov	x23, x1
  4008f8:	9343fe94 	asr	x20, x20, #3
  4008fc:	aa0203f8 	mov	x24, x2
  400900:	97ffff1c 	bl	400570 <_init>
  400904:	b4000194 	cbz	x20, 400934 <__libc_csu_init+0x6c>
  400908:	f9000bb3 	str	x19, [x29, #16]
  40090c:	d2800013 	mov	x19, #0x0                   	// #0
  400910:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400914:	aa1803e2 	mov	x2, x24
  400918:	aa1703e1 	mov	x1, x23
  40091c:	2a1603e0 	mov	w0, w22
  400920:	91000673 	add	x19, x19, #0x1
  400924:	d63f0060 	blr	x3
  400928:	eb13029f 	cmp	x20, x19
  40092c:	54ffff21 	b.ne	400910 <__libc_csu_init+0x48>  // b.any
  400930:	f9400bb3 	ldr	x19, [x29, #16]
  400934:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400938:	a942dff6 	ldp	x22, x23, [sp, #40]
  40093c:	f9401ff8 	ldr	x24, [sp, #56]
  400940:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400944:	d65f03c0 	ret

0000000000400948 <__libc_csu_fini>:
  400948:	d65f03c0 	ret

Disassembly of section .fini:

000000000040094c <_fini>:
  40094c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400950:	910003fd 	mov	x29, sp
  400954:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400958:	d65f03c0 	ret
